a new memory array structure decreasing disturb between memory cells 一种减小存储单元间串扰的新型阵列布局结构
memory array redcode simulator 内存数组红码仿真器
amorphous memory array 非晶存储器阵列
the whole circuit includes memory array, decode, sense amplifier, data in-out circuit and pre-charge circuit 电路包括存储阵列、译码电路、敏感放大器、数据输入输出电路,预充电电路等部分。
some new technologies such as dividing the memory array into separated sub-arrays, atd, pre-charge and balance, subsection decoding, multilevel sense amplifier, etc have been used 设计中采用了诸如存储阵列分块技术,地址探测技术,预充电及平衡技术,分段译码技术,分级敏感放大器等一些新技术。